Floating Point Loss of Precision Analysis
Floating point units in modern processors must constantly align mantissas before addition, a process that inherently risks permanent data loss when magnitudes differ significantly.
The scenario involves two IEEE 754 single-precision (32-bit) floating-point numbers, A and B. Number A has a biased exponent of 127 and a normalized mantissa fraction of all zeros. Number B has a biased exponent of 102 and a normalized mantissa fraction starting with 1101 followed by zeros. The ALU must compute the sum Y = A + B.
Determine the alignment shift required for B and evaluate the exact bit-level impact on the final mantissa of Y.
Constraints
- Assume standard IEEE 754 single-precision format: 1 sign bit, 8 exponent bits, 23 fraction bits.
- Assume the ALU uses a strict round-to-zero (truncation) policy for this operation without guard, round, or sticky bits.
- The implicit leading
1in normalized numbers must be accounted for during shifting.
Topics
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