Sign Extension Array
Feeding a narrow signed integer into a wider datapath without preserving its mathematical value results in catastrophic arithmetic failure. The sign extension array adapts bus widths for ALUs and memory controllers by replicating the sign bit across all newly added upper bits.
Route the 4-bit input A to the 8-bit output Y. The lower 4 bits of Y must match A exactly. The upper 4 bits of Y must match the most significant bit of A.
| Y bit | Source | |---------|--------| | Y[0] | A[0] | | Y[1] | A[1] | | Y[2] | A[2] | | Y[3] | A[3] | | Y[4] | A[3] | | Y[5] | A[3] | | Y[6] | A[3] | | Y[7] | A[3] |
Constraints
- Implement using direct wiring only.
- Do not use any active logic gates.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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