Half Adder Using Only XOR and AND
The half adder is the most fundamental arithmetic circuit in digital design. It adds two 1-bit numbers and produces a 2-bit result: a Sum bit and a Carry-out bit. Every multi-bit adder — from a simple ripple-carry adder to the complex carry-lookahead units inside modern CPUs — is built from half adders and full adders at its core. Understanding how to build one from first principles is the entry point to all arithmetic hardware design.
The half adder takes two 1-bit inputs A and B. It produces Sum = A XOR B (which is 1 when the inputs differ) and Cout = A AND B (which is 1 only when both inputs are 1, representing the carry into the next bit position). This problem constrains you to use only XOR and AND gates, which happens to be exactly the minimal implementation.
| A | B | Sum | Cout | |---|---|-----|------| | 0 | 0 | 0 | 0 | | 0 | 1 | 1 | 0 | | 1 | 0 | 1 | 0 | | 1 | 1 | 0 | 1 |
The worked example for A=1, B=1: both bits are 1, so their binary sum is 2 (decimal), which in binary is 10. The Sum bit is 0 (the least significant bit of 2) and the Cout is 1 (the carry into the next bit position). This is the only case where the carry is produced.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | A | input | 1 | First addend bit | | B | input | 1 | Second addend bit | | Sum | output | 1 | A XOR B: the least significant bit of A + B | | Cout | output | 1 | A AND B: the carry-out into the next bit position |
Constraints
- Only XOR and AND gates are allowed. No OR, NOT, NAND, NOR, or MUX components.
- The optimal and expected solution uses exactly 2 gates: 1 XOR and 1 AND.
- Both outputs must be driven: Sum must come from an XOR gate, Cout must come from an AND gate.
Topics
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