High Impedance Z Literals
Shared data buses in multiple master architectures rely on tri-state buffers to prevent electrical shorts when multiple drivers connect to the same physical wire. Only one master drives the bus at a time; all other devices must float their outputs by driving a high impedance state.
The module acts as an 8-bit multiplexer with an output disable control. When the disable signal is asserted, the output must be completely disconnected from the bus by driving all bits to high impedance (Z). When the disable signal is de-asserted, the module passes one of the two 8-bit data inputs to the output based on the select signal.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | disable_out | input | 1 | Disable control; drives output to high impedance when 1 | | sel | input | 1 | Selects data_a when 0, or data_b when 1 | | data_a | input | 8 | First data input | | data_b | input | 8 | Second data input | | out | output | 8 | Multiplexed data output or high impedance bus |
Constraints
- The circuit must be strictly combinational.
- When
disable_outis 1, all 8 bits ofoutmust be exactly8'bzzzzzzzz. - The
disable_outsignal has strict priority over theselsignal. - The output must not be registered.
Topics
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