1-Bit Magnitude Comparator
Arithmetic logic units and sorting networks rely on magnitude comparison to evaluate conditions and route data. A 1-bit magnitude comparator forms the foundational cascadable slice for N-bit comparators by evaluating two single-bit inputs and asserting exactly one of three possible relationship states.
| A | B | A_gt_B | A_eq_B | A_lt_B | |-----|-----|----------|----------|----------| | 0 | 0 | 0 | 1 | 0 | | 0 | 1 | 0 | 0 | 1 | | 1 | 0 | 1 | 0 | 0 | | 1 | 1 | 0 | 1 | 0 |
Constraints
- Use only combinational logic gates.
- Drive all three outputs simultaneously from the same input sources.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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