The Hidden LFSR
Pseudorandom number generators in hardware rely on linear feedback shift registers to produce deterministic but statistically random bit sequences.
The circuit below is a 3-bit shift register with flip-flops Q2, Q1, and Q0. The next state logic for Q2 is driven by an XOR gate taking inputs from Q1 and Q0. The remaining flip-flops shift right: the next state of Q1 is the current state of Q2, and the next state of Q0 is the current state of Q1.
Determine the state transition sequence and identify any vulnerabilities in the feedback logic.
Constraints
- The system is synchronous and all flip-flops trigger on the same rising clock edge.
- The XOR gate introduces zero propagation delay for the purpose of state analysis.
- The state is represented as the 3-bit vector
[Q2, Q1, Q0].
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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