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Codiode/Problems/Combinational Logic

2:4 Decoder with Active-High Enable

EasyLogic CircuitBuild

Memory controllers and address routing networks require a mechanism to activate specific memory banks or peripherals. An active-high enable input transforms a static decoder into a building block that can be cascaded into larger address decoding trees.

The circuit takes a 2-bit address (A1, A0) and an enable signal (EN). When EN is 1, the corresponding output line asserts high. When EN is 0, all outputs remain low regardless of the address inputs.

| EN | A1 | A0 | Y3 | Y2 | Y1 | Y0 | |------|------|------|------|------|------|------| | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | 0 | 1 | 1 | 0 | 0 | 0 | 0 | | 1 | 0 | 0 | 0 | 0 | 0 | 1 | | 1 | 0 | 1 | 0 | 0 | 1 | 0 | | 1 | 1 | 0 | 0 | 1 | 0 | 0 | | 1 | 1 | 1 | 1 | 0 | 0 | 0 |

Constraints

  • Combinational logic only.
  • Gate every output directly with the enable signal.

Topics

combinationallogic-gatesdecoder

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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