4-Variable Function via 8:1 MUX
Area-constrained standard cell designs frequently map complex logic functions directly into multiplexer trees. Shannon expansion allows a hardware designer to fold an N-variable Boolean function into an (N-1)-variable multiplexer to save significant silicon area.
Implement the 4-variable logic function Y defined by the following truth table.
| A | B | C | D | Y | |-----|-----|-----|-----|-----| | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | 1 | | 0 | 0 | 1 | 0 | 0 | | 0 | 0 | 1 | 1 | 1 | | 0 | 1 | 0 | 0 | 1 | | 0 | 1 | 0 | 1 | 0 | | 0 | 1 | 1 | 0 | 1 | | 0 | 1 | 1 | 1 | 0 | | 1 | 0 | 0 | 0 | 1 | | 1 | 0 | 0 | 1 | 0 | | 1 | 0 | 1 | 0 | 0 | | 1 | 0 | 1 | 1 | 1 | | 1 | 1 | 0 | 0 | 1 | | 1 | 1 | 0 | 1 | 0 | | 1 | 1 | 1 | 0 | 0 | | 1 | 1 | 1 | 1 | 1 |
Constraints
- Use exactly one 8:1 MUX.
- Use at most one NOT gate.
- Do not use any other logic gates.
- Connect
B,C, andDto the MUX select lines, withBas the most significant bit.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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