4-to-2 Priority Encoder from Gates
A priority encoder converts a one-hot (or multi-bit) active input into a binary code representing the highest-priority active input. It is the core of interrupt controllers: when multiple peripherals simultaneously request service, the priority encoder outputs the binary index of the highest-priority requester. ARM's NVIC, x86's 8259 PIC, and RISC-V PLIC all contain priority encoder logic. This problem tests your ability to derive the output logic from priority rules without using a component like ENC.
Your task is to implement a 4-to-2 priority encoder from AND, OR, and NOT gates. Inputs are I3, I2, I1, I0 where I3 has the highest priority. Outputs are Y1 (MSB) and Y0 (LSB) representing the binary index of the highest active input. A valid output (V) indicates at least one input is active.
Priority table (highest wins): I3=1 (any) → Y1=1, Y0=1 (index 3) I3=0, I2=1 (any) → Y1=1, Y0=0 (index 2) I3=0, I2=0, I1=1 (any) → Y1=0, Y0=1 (index 1) I3=0, I2=0, I1=0, I0=1 → Y1=0, Y0=0 (index 0) All inputs 0 → Y1=0, Y0=0, V=0
Output equations: Y1 = I3 OR I2. Y0 = I3 OR (NOT(I3) AND NOT(I2) AND I1) = I3 OR (NOT(I2) AND I1). V = I3 OR I2 OR I1 OR I0.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | I3 | input | 1 | Highest priority input | | I2 | input | 1 | Second priority input | | I1 | input | 1 | Third priority input | | I0 | input | 1 | Lowest priority input | | Y1 | output | 1 | MSB of encoded output (index bit 1) | | Y0 | output | 1 | LSB of encoded output (index bit 0) | | V | output | 1 | Valid: 1 when at least one input is active |
Constraints
- Only AND, OR, NOT gates are allowed. No ENC component, no MUX, no XOR.
- The optimal solution uses 6 components: 1 OR for Y1, 1 NOT, 1 AND, 1 OR for Y0, 1 OR3 for partial V, 1 OR for full V.
- When multiple inputs are active simultaneously, the output encodes only the highest-priority active input.
- The circuit is purely combinational. No clock or state.
Topics
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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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