Arithmetic versus Logical Shift Right
A digital audio filter scales incoming 8-bit signed integer samples by dividing them by two. The circuit takes an 8-bit input DataIn and shifts it right by one bit position to compute the 8-bit output DataOut, maintaining the two's complement sign.
Expected behavior:
Positive values halve and remain positive. Negative values halve and remain negative. The most significant bit must replicate to preserve the sign of the original sample.
Simulation shows DataOut = 124 (binary 01111100) for input DataIn = 248 (binary 11111000, representing -8). The output incorrectly becomes positive when a negative sample is processed. Inspect the circuit and correct the fault.
Constraints
- The circuit must correctly scale both positive and negative two's complement numbers.
- Do not use explicit division or multiplication components.
Topics
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