Bitwise versus Logical AND
A data masking unit applies a 2-bit mask to a 2-bit data bus to isolate specific control signals.
Expected behavior:
| A1 | A0 | B1 | B0 | Y1 | Y0 | |------|------|------|------|------|------| | 0 | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | 0 | 0 | | 0 | 0 | 1 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | 0 | 0 | | 0 | 1 | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 1 | 0 | 1 | | 0 | 1 | 1 | 0 | 0 | 0 | | 0 | 1 | 1 | 1 | 0 | 1 | | 1 | 0 | 0 | 0 | 0 | 0 | | 1 | 0 | 0 | 1 | 0 | 0 | | 1 | 0 | 1 | 0 | 1 | 0 | | 1 | 0 | 1 | 1 | 1 | 0 | | 1 | 1 | 0 | 0 | 0 | 0 | | 1 | 1 | 0 | 1 | 0 | 1 | | 1 | 1 | 1 | 0 | 1 | 0 | | 1 | 1 | 1 | 1 | 1 | 1 |
Simulation shows Y1 = 0 and Y0 = 1 for input A1=1, A0=0, B1=0, B0=1. The masked data bus incorrectly collapses to a one-bit logical result instead of evaluating the bits independently. Inspect the circuit and correct the fault.
Constraints
- The circuit must perform a proper bitwise AND operation
- Do not add or remove input or output pins
- Fix the existing logic paths to restore the expected truth table
Topics
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