Combinational Population Count
Packet processing engines, error correction modules, and neural network accelerators frequently need to determine the Hamming weight of a data word in a single clock cycle. This operation is known as a population count.
The module computes the total number of set bits (logic 1) within a 32-bit input vector. The calculation evaluates purely combinationally, meaning the output updates immediately as the input changes without waiting for a clock edge. The synthesizer will unroll the procedural logic into a parallel tree of adders to achieve a single-cycle result.
As a purely combinational circuit, there are no clock or reset signals. The output must continuously reflect the correct count for the current input vector.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | data_in | input | 32 | The data word to be evaluated | | pop_count | output | 6 | The number of set bits in data_in (range 0 to 32) |
Constraints
- The design must be purely combinational.
- No sequential elements (flip-flops or latches) may be inferred.
- The output
pop_countmust be exactly 6 bits wide to accommodate the maximum possible value of 32. - The logic must handle all possible 32-bit input combinations.
Topics
Solve this problem
Write the module in Verilog, SystemVerilog or VHDL. Your submission is compiled and simulated against a real testbench — you get the waveform back, not a stored answer.
This problem is part of Codiode Pro. The statement above is free to read.
The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.