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Codiode/Problems/Combinational Logic

Convert AND-OR to NAND Logic

HardLogic CircuitBuild

CMOS synthesis transforms all RTL into technology-mapped standard cells, overwhelmingly favoring NAND structures. Converting an idealized AND-OR schematic into a NAND-only netlist via bubble pushing allows designers to manually verify logic boundaries and debug unexpected inversion behavior.

The reference AND-OR circuit computes the logical AND of two sum-of-products expressions:

Y = ( (A & B) | (C & D) ) & ( (E & F) | (G & H) )

Implement this exact boolean function using only 2-input NAND gates. Apply systematic bubble pushing: introduce inversion bubbles at gate outputs and push them through subsequent gates using De Morgan's laws to cancel pairs, rather than re-deriving the expression from scratch.

Constraints

  • Use only 2-input NAND gates.
  • Do not use AND, OR, NOT, or XOR gates.
  • Implement purely combinational logic.

Topics

NAND SynthesisBubble PushingDe Morgan's

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