Debug a 4:2 Priority Encoder
Microprocessors use priority encoders to manage interrupt requests by assigning a strict hierarchy to incoming signals. A 4:2 priority encoder monitors inputs I3, I2, I1, and I0, and outputs a 2-bit code A1 and A0 corresponding to the highest active input index. I3 has the highest priority and I0 has the lowest. If no inputs are active, the output is 00.
Expected behavior:
| I3 | I2 | I1 | I0 | A1 | A0 | |------|------|------|------|------|------| | 1 | X | X | X | 1 | 1 | | 0 | 1 | X | X | 1 | 0 | | 0 | 0 | 1 | X | 0 | 1 | | 0 | 0 | 0 | X | 0 | 0 |
Simulation shows A1 = 1 and A0 = 1 for inputs I3=0, I2=1, I1=1, I0=0. The encoder incorrectly outputs the code for I3 when I1 and I2 are simultaneously active. Inspect the circuit and correct the fault.
Constraints
- Do not modify the input or output ports.
- Use basic logic gates to resolve the priority conflict.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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