Forcing Sum of Products
Critical-path control logic often requires the absolute minimum gate depth to meet stringent timing requirements. While synthesis tools typically factor complex boolean equations into multi-level logic to save area, designers can guide the tool toward fast, two-level AND-OR structures by explicitly writing equations in Sum-of-Products (SOP) form.
The module evaluates a 4-bit input vector x and computes a single-bit output y. The output asserts high based on four specific product terms logically ORed together. The conditions for these four terms are: bit 3 and bit 2 are both high; bit 3 is low and bit 1 is high; bit 2 is high and bit 0 is low; bit 1 is low and bit 0 is high.
The logic is purely combinational. There is no clock or reset signal.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | x | input | 4 | 4-bit input vector | | y | output | 1 | Combinational logic output; evaluates to 1 when any of the four product terms are true, 0 otherwise |
Constraints
- The module must be purely combinational.
- Do not use latches, registers, or clocked blocks.
- The bit width of
xis exactly 4 bits. - The output
yis exactly 1 bit.
Topics
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Write the module in Verilog, SystemVerilog or VHDL. Your submission is compiled and simulated against a real testbench — you get the waveform back, not a stored answer.
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