LFSR Seed Selection for Coverage
Built-In Self-Test architectures rely on Linear Feedback Shift Registers to generate pseudo-random patterns for fault detection without external test equipment.
The system under test contains a 3-bit standard LFSR acting as a pattern generator, driving inputs A, B, and C of a combinational logic block. The LFSR uses an XOR gate for feedback to generate a maximal-length sequence. The attached logic block contains a critical stuck-at-1 fault that can only be sensitized and propagated when the input vector is 000.
Analyze the state sequence of the LFSR given a non-zero starting seed. Determine the coverage limitations of this specific BIST implementation and identify why the fault escapes detection.
Constraints
- The LFSR utilizes standard XOR feedback logic.
- The combinational logic block has exactly 3 inputs driven directly by the LFSR state registers.
- The initial seed loaded into the LFSR is strictly non-zero.
Topics
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