Maximum of Two Unsigned 4-bit Numbers
Selecting the larger of two values is a fundamental datapath operation. It appears in branch predictors (selecting the higher-confidence path), in saturation arithmetic (clamping to a maximum), and in sorting networks. Every max-pooling layer in neural network inference hardware uses exactly this circuit, repeated in parallel. This problem tests your ability to combine a magnitude comparator with a data-steering mux.
Your task is to build a circuit that computes Y = max(A, B) for two unsigned 4-bit inputs. Each input is provided as individual bits: A3 (MSB) through A0 (LSB) for A, and B3 through B0 for B. The four-bit output Y3 through Y0 equals A if A is greater than or equal to B, and equals B if B is strictly greater than A. If A equals B, outputting either A or B is correct (they are the same value).
The approach uses a 4-bit unsigned subtraction: compute A + NOT(B) + 1 (which equals A minus B, with carry-out = 1 when A >= B). The carry-out of this subtraction is the Greater-Than-or-Equal (GTE) flag. Then steer A to the output when GTE=1, and B when GTE=0, using four 2-to-1 mux gates — one per output bit.
Worked examples: A=1010 (10), B=0110 (6) → GTE=1 (10 >= 6) → Y=A=1010. A=0011 (3), B=1100 (12) → GTE=0 → Y=B=1100. A=0101 (5), B=0101 (5) → GTE=1 → Y=A=0101.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | A3 | input | 1 | MSB of A | | A2 | input | 1 | Bit 2 of A | | A1 | input | 1 | Bit 1 of A | | A0 | input | 1 | LSB of A | | B3 | input | 1 | MSB of B | | B2 | input | 1 | Bit 2 of B | | B1 | input | 1 | Bit 1 of B | | B0 | input | 1 | LSB of B | | Y3 | output | 1 | MSB of max(A, B) | | Y2 | output | 1 | Bit 2 of max(A, B) | | Y1 | output | 1 | Bit 1 of max(A, B) | | Y0 | output | 1 | LSB of max(A, B) |
Constraints
- The circuit is purely combinational. No clock or state.
- Unsigned comparison: A3 is the most significant bit and determines magnitude.
- The optimal 12-component solution: 4 NOT (to invert B bits) + 4 FA (ripple-carry A minus B + 1 with Cin=1 at FA0) + 4 MUX (to steer per output bit using carry-out as the select).
- The carry-out of the most significant FA is the GTE flag (1 means A >= B).
- Connect constant 1 to the Cin input of the least-significant FA to implement the +1 in two's complement subtraction.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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