CodiodeCodiode
Home
Problem Solving
Skill Tracks
My Assignments
Contests
Leaderboard
Community
Settings
Codiode/Problems/Combinational Logic

Overlapping Cases with Unique Warning

MediumLogic CircuitDebug

A memory map decoder assigns a 4-bit address to one of three distinct memory regions.

Expected behavior:

| addr (decimal) | region | |------------------|----------| | 0, 1, 2, 3 | 0 | | 4, 5, 6, 7 | 1 | | 8 through 15 | 2 |

Simulation logs show a runtime warning regarding overlapping unique case conditions. Post-synthesis testing shows region = 2 for input addr = 5. The expected output is 1. Inspect the circuit and correct the fault.

Constraints

  • Do not remove the unique keyword from the case statement
  • Maintain the intended priority and mapping
  • All address conditions must be mutually exclusive

Topics

debugdecoderrtlsystemverilog

Solve this problem

Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

This problem is part of Codiode Pro. The statement above is free to read.

Sign in to solveSee what Pro unlocks

The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.

Related problems

  • Binary to HexEasy
  • 1-to-4 Demultiplexer from AND and NOT GatesEasy
  • 2-to-4 Line Decoder with Active-High EnableEasy
  • Hex Nibble to BinaryEasy
  • Odd Parity Bit Generator for 3-bit DataEasy
  • Full Adder from Half AddersEasy
  • Modulo ArithmeticMedium
  • Two's Complement: Encode a Negative DecimalEasy

Browse all problems · Learning tracks