Shared Gate Fault Propagation
Hardware debugging often reveals that modifying a shared logic cone introduces functional bugs across multiple downstream paths. Multi-output synthesis relies on shared gates to save area, but a single stuck-at fault propagates to all connected outputs.
Implement a dual-output combinational circuit alongside its fault-injected equivalent. The base shared node is S = A & B. The primary outputs are F1 = S | C and F2 = S ^ C. The fault outputs F1_err and F2_err must represent the exact logic behavior if the shared node S is permanently tied to 1.
| A | B | C | F1 | F2 | F1_err | F2_err | |-----|-----|-----|------|------|----------|----------| | 0 | 0 | 0 | 0 | 0 | 1 | 1 | | 0 | 0 | 1 | 1 | 1 | 1 | 0 | | 0 | 1 | 0 | 0 | 0 | 1 | 1 | | 0 | 1 | 1 | 1 | 1 | 1 | 0 | | 1 | 0 | 0 | 0 | 0 | 1 | 1 | | 1 | 0 | 1 | 1 | 1 | 1 | 0 | | 1 | 1 | 0 | 1 | 1 | 1 | 1 | | 1 | 1 | 1 | 1 | 0 | 1 | 0 |
Constraints
- Implement strictly combinational logic.
- Drive all four output ports using standard logic gates.
- Do not use high-level arithmetic blocks or multiplexers.
Topics
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