The For Loop Variable Bounds Latch
Hardware synthesis tools cannot dynamically execute loops at runtime: they must statically unroll them into physical gates.
The RTL snippet under review shows a combinational block containing a for loop where the upper bound is defined by an input signal N, an 8-bit wire. Inside the loop, an accumulator Y is updated based on an array data_in.
Analyze the synthesized hardware footprint of this block. Determine the logic structures inferred by the variable loop bound and identify why the synthesis tool generates unintended state elements.
Constraints
Nis an 8-bit unsigned integer input.- The loop iterates from
0toN. data_inis a packed array of 256 8-bit values.Yis updated purely combinationally inside analways @(*)block.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
This problem is part of Codiode Pro. The statement above is free to read.
The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.