Tri State Driver Assignment
Shared communication buses rely on multiple devices connecting to the same physical wires. To prevent short circuits and data corruption, a device must electrically disconnect from the bus when it is not actively transmitting data. This disconnection is achieved using a high impedance state, effectively removing the device's influence on the shared wire.
The driver module acts as a bridge between an internal data source and a shared external bus. When the output enable signal is asserted, the internal data is driven directly onto the bus. When the enable signal is deasserted, the driver releases the bus by outputting a high impedance state, allowing other devices to drive the line safely.
This is a purely combinational circuit. There is no clock or reset signal. The output responds immediately to any changes in the input data or the enable signal.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | data_in | input | 8 | Internal data to be transmitted | | out_en | input | 1 | Active-high output enable | | bus_out | output | 8 | Tri-state driven bus output; drives data_in when out_en is 1, otherwise high impedance |
Constraints
- Purely combinational logic; do not use edge-triggered registers.
- The output must evaluate to exactly
8'bzzzzzzzzwhen disabled. - Use a continuous assignment with a ternary operator.
Topics
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