Two's Complement Range Asymmetry
Hardware arithmetic units rely on two's complement encoding to simplify addition and subtraction into a single circuit path. A 4-bit two's complement system allocates binary patterns to positive and negative integers. The most significant bit acts as the sign bit, carrying a negative weight of -2^(N-1).
Analyze the 4-bit encoding space to determine the maximum and minimum representable values. Identify the structural cause of the range asymmetry and evaluate the behavior of the system when negating the most negative number.
Constraints
- The system strictly uses a 4-bit data width.
- Negation is defined by the standard two's complement algorithm: invert all bits and add 1.
- Arithmetic operations discard any carry out beyond the 4th bit.
Topics
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