Unique Case Overlapping Conditions
An address decoder maps memory-mapped peripheral transactions to individual chip-select lines based on the requested address byte. Decoders of this form sit at the top of every SoC interconnect fabric, routing read and write transactions to the correct peripheral. A unique case statement is used so the synthesis tool can assert that exactly one branch fires per input value, enabling logic optimization.
The solution module accepts an 8-bit addr input and drives three combinational chip-select outputs. Addresses 0x00 to 0x3F select peripheral A. Addresses 0x40 to 0x7F select peripheral B. Addresses 0x80 to 0xBF select peripheral C. All other addresses de-assert all selects.
Synthesis logs show a unique case violation. Simulation shows sel_a = 1 and sel_b = 0 for input addr = 8'h40. The expected output for this address is sel_a = 0 and sel_b = 1. Inspect the RTL and correct the fault.
| Signal | Direction | Width | Description | |---------|-----------|-------|-------------| | addr | input | 8 | Address byte from the interconnect | | sel_a | output | 1 | Chip-select for peripheral A; asserted when addr is in range 0x00 to 0x3F | | sel_b | output | 1 | Chip-select for peripheral B; asserted when addr is in range 0x40 to 0x7F | | sel_c | output | 1 | Chip-select for peripheral C; asserted when addr is in range 0x80 to 0xBF |
Constraints
- All outputs are purely combinational.
- Do not remove the
uniquekeyword from the case statement. - Exactly one output is asserted for addresses in a defined range; all three are de-asserted for addresses 0xC0 to 0xFF.
- Range boundaries are inclusive on both ends.
Topics
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