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Codiode/Problems/Combinational Logic

Unsized Number Truncation

MediumLogic CircuitDebug

A next-state decoder maps a 2-bit Mode input to a 4-bit one-hot NextState output.

Expected behavior:

| Mode | NextState | |--------|-------------| | 0 | 1 | | 1 | 2 | | 2 | 4 | | 3 | 8 |

Simulation shows NextState = 0 for input Mode = 3. The state output is incorrect for the final mode. Inspect the circuit and correct the fault.

Constraints

  • Do not change the module interface or port widths.
  • Only modify the internal logic or assignments to resolve the truncation.

Topics

State MachineSyntaxVerilogTruncation

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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