ALU Zero Flag Logic
The zero flag determines whether a conditional branch instruction executes in modern processors, placing it directly on the critical timing path. It must rapidly evaluate an entire multi-bit arithmetic result and assert high only when all bits are logic low.
The circuit receives an 8-bit bus Result. The output Z must evaluate to 1 if and only if all 8 bits of Result are 0.
| Result | Z | |----------|-----| | 00000000 | 1 | | 00000001 | 0 | | 00010000 | 0 | | 10000000 | 0 | | 11111111 | 0 |
Constraints
- Limit gate fan-in to a maximum of 2 inputs.
- Construct a balanced logic tree to minimize propagation delay.
- Use strictly combinational logic.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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