Extract Expression from a Three-Level Circuit with Mixed Gate Types
Automated formal verification tools require extracting exact Boolean expressions from gate-level netlists to prove equivalence. The schematic below shows a three-level combinational circuit with inputs A, B, and C. Inputs A and B drive a two-input AND gate, and the output of this AND gate immediately passes through a NOT gate. The output of the NOT gate and input C feed into a two-input OR gate to produce the final output Y. Trace the signal paths to construct the precise structural Boolean expression for Y.
Constraints
- Boolean expressions must reflect the exact gate topology, not a simplified equivalent.
- Use the prime symbol (') for inversion.
- Use parentheses to explicitly define the scope of inversions applied to intermediate nodes.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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