CodiodeCodiode
Home
Problem Solving
Skill Tracks
My Assignments
Contests
Leaderboard
Community
Settings
Codiode/Problems/Combinational Logic

Nested Concatenation and Replication

HardVerilog / SystemVerilogBuild

Network interfaces and bus bridges frequently assemble control fields into fixed width packet headers. When protocol fields do not consume the entire header width, the remaining space must be padded with zeros to ensure alignment.

The module receives four distinct protocol fields and packs them into a single 32 bit output header. The fields must be concatenated in a specific order from the most significant bit to the least significant bit. Zero padding must be inserted between specific fields using replication operators.

The mapping of the 32 bit header is as follows: • Bits [31:28]: version • Bits [27:22]: type_id • Bits [21:18]: 4 bits of zero padding • Bits [17:15]: flags • Bits [14:8]: 7 bits of zero padding • Bits [7:0]: payload_len

This is a purely combinational circuit. The output header must reflect the concatenated inputs continuously and immediately.

| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | version | input | 4 | Protocol version number | | type_id | input | 6 | Packet type identifier | | flags | input | 3 | Control flags | | payload_len | input | 8 | Length of the payload in bytes | | header | output | 32 | Formatted 32 bit packet header |

Constraints

  • The output header must be driven by purely combinational logic.
  • The output must be exactly 32 bits wide.
  • Unused bits in the padding regions must be strictly driven to 0.

Topics

Combinational LogicVerilog SyntaxConcatenationReplication

Solve this problem

Write the module in Verilog, SystemVerilog or VHDL. Your submission is compiled and simulated against a real testbench — you get the waveform back, not a stored answer.

This problem is part of Codiode Pro. The statement above is free to read.

Sign in to solveSee what Pro unlocks

The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.

Related problems

  • Single Continuous AssignmentEasy
  • Basic Vector ConcatenationEasy
  • Ternary Operator MuxEasy
  • Underscores for ReadabilityEasy
  • Left Hand Side ConcatenationEasy
  • Inout Port MechanicsEasy
  • Explicit Binary LiteralsEasy
  • Vector Port EndiannessEasy

Browse all problems · Learning tracks