Population Count Optimization
Neural network accelerators and error correcting decoders frequently compute the Hamming weight, or population count, of wide data vectors. While modern synthesis tools can sometimes optimize simple loops, high performance designs explicitly structure these reductions as balanced adder trees to guarantee minimal logic depth and meet aggressive timing constraints.
The module receives a 16-bit input vector and calculates the total number of set bits. The combinational reduction must complete within a single clock cycle; the final count is then registered on the output.
Clock edge: posedge clk Reset type: Asynchronous, active-low Reset polarity: When rst_n is 0, pop_count is forced to 5'b00000. Output: pop_count is a registered output that updates on posedge clk with the population count of data_in from the setup window of the same clock edge.
Cycle 1: rst_n=0, data_in=16'hFFFF → pop_count=0 (reset) Cycle 2: rst_n=1, data_in=16'h0000 → pop_count=0 Cycle 3: rst_n=1, data_in=16'h0001 → pop_count=1 Cycle 4: rst_n=1, data_in=16'hA5A5 → pop_count=8 Cycle 5: rst_n=1, data_in=16'hFFFF → pop_count=16 Cycle 6: rst_n=1, data_in=16'h1234 → pop_count=5
{ "signal": [
{ "name": "clk", "wave": "p......" },
{ "name": "rst_n", "wave": "0.1...." },
{ "name": "data_in", "wave": "x.=====", "data": ["16'h0000", "16'h0001", "16'hA5A5", "16'hFFFF", "16'h1234"] },
{ "name": "pop_count", "wave": "0..====", "data": ["0", "1", "8", "16", "5"] }
], "head": { "text": "Cycle-by-cycle population count with registered output." } }| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | clk | input | 1 | Positive-edge triggered clock | | rst_n | input | 1 | Asynchronous active-low reset; drives pop_count to 0 | | data_in | input | 16 | The input vector to be evaluated | | pop_count | output | 5 | Registered count of set bits in data_in |
Constraints
- Clock edge must be
posedge clk. - Reset must be asynchronous and active-low.
pop_countmust be exactly 5 bits wide to safely represent values from 0 to 16.pop_countmust be registered; it updates on the clock edge based on the combinational popcount ofdata_in.- The combinational logic should be structurally implemented as a balanced reduction tree to minimize logic depth.
Topics
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