Untestable Faults in Hazard Free Logic
High-speed combinational datapaths require hazard-free logic to prevent spurious glitches from triggering downstream state elements.
The logic circuit implements the Boolean function Y = AB + B'C + AC. The term AC is the consensus term added specifically to eliminate a static-1 hazard that occurs during transitions of B. The hardware implementation consists of three 2-input AND gates driving a single 3-input OR gate.
Analyze the testability of this hazard-free implementation. Identify how the redundant consensus logic impacts stuck-at fault coverage and determine the specific fault that cannot be detected by any test vector.
Constraints
- Assume a single stuck-at fault model.
- Primary inputs
A,B, andCare fully controllable. - The output
Yis fully observable.
Topics
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