3-Variable Function via 8:1 MUX
Lookup tables (LUTs) in FPGAs use multiplexers to implement arbitrary logic functions without requiring discrete gate arrays. By mapping input variables to select lines, a single multiplexer can evaluate any Boolean expression directly from its truth table.
Implement the specific 3-variable Boolean function defined below. Route the inputs A, B, and C to the multiplexer select lines to drive the output Y.
| A | B | C | Y | |-----|-----|-----|-----| | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | | 0 | 1 | 0 | 1 | | 0 | 1 | 1 | 0 | | 1 | 0 | 0 | 1 | | 1 | 0 | 1 | 0 | | 1 | 1 | 0 | 0 | | 1 | 1 | 1 | 1 |
Constraints
- Use exactly one 8:1 multiplexer.
- Do not use any discrete logic gates.
- Tie all multiplexer data inputs directly to constant high or constant low signals.
Topics
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