Debounce Logic with Hysteresis
Mechanical switches exhibit physical bounce during actuation, causing rapid, spurious voltage transitions. Hardware debounce logic filters these transients to present a clean, stable signal to downstream digital systems.
Implement a debounce circuit that filters the noisy input btn_in. The output btn_out must only update to match btn_in after btn_in has remained stable at a new logical value for 4 consecutive rising edges of clk. If btn_in bounces back to its old value before the 4-cycle threshold is reached, the internal counter must reset and btn_out must remain unchanged.
| btn_in State | Consecutive clk Edges | btn_out (Next State) | |---|---|---| | Same as btn_out | Any | btn_out (Unchanged) | | Different from btn_out | < 4 | btn_out (Unchanged) | | Different from btn_out | 4 | btn_in (Toggles) |
Constraints
- Use synchronous sequential logic triggered on the rising edge of
clk. - Implement a 2-bit internal counter to track stability cycles.
- Reset the counter immediately to 0 if
btn_inmatchesbtn_out. - Initialize
btn_outand the internal counter to 0 whenrstis high.
Topics
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