Debug Sequential: Deadlock State Identification
Mission-critical finite state machines must gracefully recover from single event upsets that force them into undefined states. A 3-bit state machine controls a sequence using five valid states. If an anomaly forces the machine into an unused state (101, 110, or 111), the next-state combinational logic must route it back to 000 on the next clock cycle regardless of the input X.
Expected behavior:
| S2 | S1 | S0 | X | N2 | N1 | N0 | |------|------|------|-----|------|------|------| | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | 0 | 0 | 1 | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | 0 | 1 | 0 | | 0 | 1 | 0 | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 1 | 0 | 1 | 1 | | 0 | 1 | 1 | 0 | 0 | 0 | 0 | | 0 | 1 | 1 | 1 | 1 | 0 | 0 | | 1 | 0 | 0 | 0 | 0 | 0 | 0 | | 1 | 0 | 0 | 1 | 0 | 0 | 0 | | 1 | 0 | 1 | 0 | 0 | 0 | 0 | | 1 | 0 | 1 | 1 | 0 | 0 | 0 | | 1 | 1 | 0 | 0 | 0 | 0 | 0 | | 1 | 1 | 0 | 1 | 0 | 0 | 0 | | 1 | 1 | 1 | 0 | 0 | 0 | 0 | | 1 | 1 | 1 | 1 | 0 | 0 | 0 |
Simulation shows that when the current state is 111, the next state evaluates to 111 for all values of input X. The system hangs permanently in this state instead of recovering to 000. Inspect the circuit and correct the fault.
Constraints
- Do not modify the logic paths for the five valid states.
- The fix requires replacing exactly one incorrect component or connection.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
This problem is part of Codiode Pro. The statement above is free to read.
The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.