Dual Edge Pulse Generator
Interfacing with external buttons or slow signals requires precise synchronization to the system clock. A dual-edge pulse generator produces a clean, one-cycle synchronous pulse whenever the input signal transitions in either direction.
The circuit monitors the input A. Whenever A changes state from 0 to 1 or from 1 to 0, the output P must assert high for exactly one clock cycle. Assume the input A aligns with the clock domain and the initial state is 0.
| Cycle | A | P | |-------|-----|-----| | 1 | 0 | 0 | | 2 | 1 | 1 | | 3 | 1 | 0 | | 4 | 1 | 0 | | 5 | 0 | 1 | | 6 | 0 | 0 |
Constraints
- Use only D flip-flops and basic logic gates.
- Do not use analog delay elements or inverter chains to create delays.
- The output pulse must be exactly one clock cycle wide.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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