FIFO Full Condition Logic

Asynchronous FIFOs rely on Gray code pointers to safely transfer state across clock domains. In the write domain, the controller must determine if the FIFO is full by comparing the local write pointer against the synchronized read pointer to prevent data overwrite.

The module evaluates two Gray code pointers to detect a full condition. A Gray-coded FIFO is full when the write pointer has wrapped exactly once relative to the read pointer. In Gray code, this wrap condition occurs when the top two bits of the write pointer are the exact inverse of the synchronized read pointer's top two bits, while all remaining lower bits match exactly. The evaluated full condition is then registered on the write clock.

The module must include a parameter ADDR_WIDTH with a default value of 4. The pointer widths are ADDR_WIDTH + 1 bits.

• Clock edge: posedge clk
• Reset: Asynchronous active-low rst_n
• Reset behavior: wfull resets to 0

Worked Trace: • Cycle 1: rst_n=0 → wfull=0 • Cycle 2: rst_n=1, wptr=5'b00000, wq2_rptr=5'b00000. On posedge clk, wfull evaluates to 0. • Cycle 3: wptr=5'b00001, wq2_rptr=5'b00000. On posedge clk, wfull evaluates to 0. • Cycle 4: wptr=5'b11000, wq2_rptr=5'b00000. On posedge clk, wfull evaluates to 1 (FIFO full). • Cycle 5: wptr=5'b11000, wq2_rptr=5'b00001. On posedge clk, wfull evaluates to 0 (Read occurred).

{ "signal": [
  { "name": "clk",      "wave": "p....." },
  { "name": "rst_n",    "wave": "01...." },
  { "name": "wptr",     "wave": "======", "data": ["00000", "00000", "00001", "11000", "11000", "11000"] },
  { "name": "wq2_rptr", "wave": "======", "data": ["00000", "00000", "00000", "00000", "00001", "00001"] },
  { "name": "wfull",    "wave": "000010" }
], "head": { "text": "Cycle-by-cycle evaluation of Gray code full condition." } }

| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | clk | input | 1 | Positive-edge triggered write clock | | rst_n | input | 1 | Asynchronous active-low reset; wfull goes to 0 when asserted | | wptr | input | ADDR_WIDTH+1 | Write pointer in Gray code | | wq2_rptr | input | ADDR_WIDTH+1 | Synchronized read pointer in Gray code | | wfull | output | 1 | Registered full flag |

Constraints

• The full condition must be registered on the positive edge of clk.
• The pointers must be treated as Gray code sequences, not standard binary.
• The parameter ADDR_WIDTH must dictate the bit slicing for the comparison logic; do not hardcode index 4 or 3.
• Asynchronous reset must take priority and drive the output to 0 immediately.

Topics

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