Fixed Point Saturation Logic
Audio and video processing pipelines cannot tolerate arithmetic wrap-around. A bright white pixel that overflows into pitch black creates a catastrophic visual glitch.
Implement a 4-bit signed saturating adder. When the sum of two 4-bit two's complement numbers A and B exceeds the maximum positive value, clamp the output Y to 0111. When the sum falls below the minimum negative value, clamp the output Y to 1000. If no overflow occurs, Y must equal the exact sum.
| A | B | Y | |-----|-----|-----| | 0010 | 0011 | 0101 | | 0110 | 0011 | 0111 | | 1100 | 1101 | 1001 | | 1001 | 1110 | 1000 |
Constraints
- Combinational logic only.
- Do not use pre-built saturating adder components.
Topics
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