IEEE 754 Exponent Subtractor
Floating-point adders must align the mantissas of incoming operands before performing arithmetic. This alignment requires determining the absolute difference between the two biased exponents and identifying which operand requires the shift.
The circuit accepts two 8-bit unsigned exponents, expA and expB. It outputs an 8-bit absolute difference diff and a 1-bit flag a_greater.
| Condition | diff | a_greater | |-----------|--------|-------------| | expA > expB | expA - expB | 1 | | expA <= expB | expB - expA | 0 |
Constraints
- Implement using combinational logic only.
- Do not use sequential elements or clocks.
Topics
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