IEEE 754 Mantissa Alignment Shifter
Floating-point addition requires operands to have identical exponent weights before their significands can be combined. The mantissa alignment shifter performs this critical step in a floating-point unit by right-shifting the smaller number's mantissa by the absolute difference of the exponents.
The circuit receives a 23-bit fractional mantissa mant_in and an 8-bit unsigned exponent difference exp_diff. It must first restore the IEEE 754 hidden 1 bit by prepending it to mant_in, creating a 24-bit significand. This 24-bit value is then logically right-shifted by exp_diff positions to produce the 24-bit mant_out. If exp_diff is 24 or greater, all active bits are shifted out and mant_out must be exactly 0.
Constraints
- Use only combinational logic.
- Do not use sequential elements or clocks.
- The output
mant_outmust be exactly 24 bits wide.
Topics
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