Invalid BCD Detector
Decimal displays and financial hardware accelerators rely heavily on Binary Coded Decimal representations. Arithmetic units processing these nibbles must instantly flag when a 4-bit value exceeds the decimal digit limit of nine.
The circuit evaluates a 4-bit input consisting of A3, A2, A1, and A0 where A3 is the most significant bit. It must drive output Y high if the binary value represents an invalid BCD state: values 10 through 15 inclusive.
| A3 | A2 | A1 | A0 | Y | |------|------|------|------|-----| | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | 0 | | 0 | 0 | 1 | 0 | 0 | | 0 | 0 | 1 | 1 | 0 | | 0 | 1 | 0 | 0 | 0 | | 0 | 1 | 0 | 1 | 0 | | 0 | 1 | 1 | 0 | 0 | | 0 | 1 | 1 | 1 | 0 | | 1 | 0 | 0 | 0 | 0 | | 1 | 0 | 0 | 1 | 0 | | 1 | 0 | 1 | 0 | 1 | | 1 | 0 | 1 | 1 | 1 | | 1 | 1 | 0 | 0 | 1 | | 1 | 1 | 0 | 1 | 1 | | 1 | 1 | 1 | 0 | 1 | | 1 | 1 | 1 | 1 | 1 |
Constraints
- Use combinational logic only.
- Implement the logic using a maximum of three logic gates.
- Do not use multiplexers or decoders.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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