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Codiode/Problems/Combinational Logic

Reconvergent Fanout Masking

HardLogic CircuitAnalyze

Automatic test pattern generation algorithms struggle significantly when signals split and later recombine. The circuit below features a primary input A that fans out to two parallel logic paths. Path one passes through a buffer to node B. Path two passes through an inverter to node C. Nodes B and C act as inputs to a downstream XOR gate, which drives the final output Y. A stuck-at-1 fault is present at the fanout stem A. Trace the propagation of this fault through both paths. Determine whether the fault can be observed at output Y and identify the masking mechanism.

Constraints

  • Assume standard gate delays are zero for static fault analysis.
  • The fault at A is a permanent stuck-at-1 fault.
  • The circuit contains no other faults.

Topics

fault-testingd-algorithmreconvergent-fanoutboolean-difference

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