The 75 Percent Adder
A 2-bit ripple carry adder computes the binary sum of two 2-bit numbers.
Expected behavior:
| A1 | A0 | B1 | B0 | Cout | S1 | S0 | |------|------|------|------|--------|------|------| | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | 0 | 0 | 1 | 0 | 0 | 1 | 0 | | 0 | 0 | 1 | 1 | 0 | 1 | 1 | | 0 | 1 | 0 | 0 | 0 | 0 | 1 | | 0 | 1 | 0 | 1 | 0 | 1 | 0 | | 0 | 1 | 1 | 0 | 0 | 1 | 1 | | 0 | 1 | 1 | 1 | 1 | 0 | 0 | | 1 | 0 | 0 | 0 | 0 | 1 | 0 | | 1 | 0 | 0 | 1 | 0 | 1 | 1 | | 1 | 0 | 1 | 0 | 1 | 0 | 0 | | 1 | 0 | 1 | 1 | 1 | 0 | 1 | | 1 | 1 | 0 | 0 | 0 | 1 | 1 | | 1 | 1 | 0 | 1 | 1 | 0 | 0 | | 1 | 1 | 1 | 0 | 1 | 0 | 1 | | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
Simulation shows Cout = 0, S1 = 1, and S0 = 1 for inputs A1=0, A0=1, B1=0, B0=0. The carry propagation produces incorrect sums for specific input combinations. Inspect the circuit and correct the fault.
Constraints
- Do not alter the input or output pins.
- Use only standard logic gates (AND, OR, XOR, NOT).
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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