The Partial Assignment Latch
An instruction decoder asserts a valid flag for recognized opcodes and clears it for unassigned ones.
Expected behavior:
| Op1 | Op0 | WriteEn | Valid | |-------|-------|-----------|---------| | 0 | 0 | 0 | 0 | | 0 | 1 | 0 | 1 | | 1 | 0 | 0 | 1 | | 1 | 1 | 1 | 1 |
Simulation shows Valid = 1 for input Op1=0, Op0=0 after transitioning from a valid opcode. The Valid output fails to clear and retains its previous state. Inspect the circuit and correct the fault.
Constraints
- The circuit must be strictly combinational.
- Do not modify the
WriteEnlogic path.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
This problem is part of Codiode Pro. The statement above is free to read.
The circuit builder and code editor need a desktop screen. On a phone, read the problem here and open it on a laptop to solve.