Tristate Bus Driver
Bidirectional buses in hardware systems, like I2C or external memory interfaces, rely on shared physical wires. Multiple devices can connect to the same wire, but only one is permitted to actively drive it at any given time to prevent electrical short circuits.
The module acts as a tristate buffer for a single-bit bidirectional bus. When the output enable signal is asserted, the buffer actively drives the input data onto the bus. When the output enable is deasserted, the buffer releases the bus by driving a high-impedance state, allowing other devices to control the wire.
This is a purely combinational circuit with no clock or reset. The output must update immediately upon changes to either the input data or the output enable signal.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | data_in | input | 1 | Data to be driven onto the bus | | out_en | input | 1 | Active-high output enable | | bus_out | output | 1 | Tristate output bus |
Truth Table: • data_in=0, out_en=1 → bus_out=0 • data_in=1, out_en=1 → bus_out=1 • data_in=0, out_en=0 → bus_out=z • data_in=1, out_en=0 → bus_out=z
Constraints
- Purely combinational logic; no latches or registers.
- Must output exactly a high-impedance state when disabled.
- Continuous assignment must be used to infer the tristate buffer.
Topics
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