JK Flip-Flop from DFF
Many legacy control state machines and toggle-based counters rely on JK flip-flops for their versatile hold, set, reset, and toggle behaviors. When targeting modern standard cell libraries that only provide D-type flip-flops, the exact JK behavior must be synthesized using external combinational logic routed into the data input.
Implement a JK flip-flop using a single D flip-flop and combinational logic. The circuit must satisfy the standard JK characteristic table.
| J | K | Q | Q_next | |-----|-----|-----|----------| | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | | 0 | 1 | 0 | 0 | | 0 | 1 | 1 | 0 | | 1 | 0 | 0 | 1 | | 1 | 0 | 1 | 1 | | 1 | 1 | 0 | 1 | | 1 | 1 | 1 | 0 |
Constraints
- Use exactly one D flip-flop.
- Use only basic combinational logic gates (AND, OR, NOT) to drive the
Dinput. - Do not use any other sequential elements.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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