T Flip-Flop from a D Flip-Flop
The T (toggle) flip-flop is the fundamental building block of binary counters. Each bit position in a ripple counter or a synchronous counter is implemented with a T-FF: when T=1, the output toggles on every clock edge; when T=0, the output holds its current value. In digital ASIC design, T-FFs are not usually available as a primitive cell — they are synthesized from D flip-flops, which are the standard storage element. This is the conversion that every digital design engineer must know.
Your task is to implement a T flip-flop using exactly one D flip-flop and one XOR gate. The T flip-flop behavior on each positive clock edge is: if T=0, Q_next = Q (hold); if T=1, Q_next = NOT(Q) (toggle). The conversion is D = T XOR Q — this single equation implements the full T-FF behavior using the DFF's own output as a feedback input.
State table (transitions on positive clock edge): T=0, Q=0 → Q_next=0 (hold 0) T=0, Q=1 → Q_next=1 (hold 1) T=1, Q=0 → Q_next=1 (toggle to 1) T=1, Q=1 → Q_next=0 (toggle to 0)
The XOR gate computes D = T XOR Q, and Q is the feedback from the DFF output back into the XOR input. This creates the characteristic toggle behavior when T=1 and the hold behavior when T=0.
| Signal | Direction | Width | Description | |--------|-----------|-------|-------------| | T | input | 1 | Toggle input: 0 = hold, 1 = toggle Q on each clock edge | | CLK | input | 1 | Clock, positive-edge triggered | | Q | output | 1 | Flip-flop state output |
Constraints
- Use exactly 1 DFF and 1 XOR gate. No AND, OR, NOT, NAND, NOR, or MUX.
- Q is the feedback: the DFF's Q output connects back to one input of the XOR gate.
- T connects to the other input of the XOR gate.
- The XOR output connects to the DFF's D input.
- Q transitions occur on the positive edge of CLK.
Topics
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