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Codiode/Problems/Sequential Logic

T Flip-Flop to JK Conversion

HardLogic CircuitBuild

Universal flip-flop conversions are essential for optimizing standard cell libraries where only specific sequential primitives are available. Transforming a toggle-based state element into a fully programmable set, reset, and toggle element requires precise state feedback.

Implement a JK flip-flop using a single T flip-flop and basic combinational logic. The circuit must satisfy the standard JK characteristic table.

| J | K | Q | Q_next | |-----|-----|-----|----------| | 0 | 0 | 0 | 0 | | 0 | 0 | 1 | 1 | | 0 | 1 | 0 | 0 | | 0 | 1 | 1 | 0 | | 1 | 0 | 0 | 1 | | 1 | 0 | 1 | 1 | | 1 | 1 | 0 | 1 | | 1 | 1 | 1 | 0 |

Constraints

  • Use exactly one T flip-flop.
  • Use only AND, OR, and NOT gates to construct the excitation logic.
  • Route the global clk signal directly to the flip-flop clock input.

Topics

conversionsequential-logicflip-flopsstate-machine

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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