Unreachable Recovery State
A one-hot encoded state machine controls a critical sequence and must recover to an idle state if radiation or power glitches cause an invalid state. The next-state logic computes the next state N2, N1, N0 based on the current state S2, S1, S0 and a Go signal.
Expected behavior:
| S2 | S1 | S0 | Go | N2 | N1 | N0 | Note | |---|---|---|---|---|---|---|---| | 0 | 0 | 1 | 0 | 0 | 0 | 1 | IDLE wait | | 0 | 0 | 1 | 1 | 0 | 1 | 0 | IDLE to ACTIVE | | 0 | 1 | 0 | 0 | 1 | 0 | 0 | ACTIVE to DONE | | 0 | 1 | 0 | 1 | 1 | 0 | 0 | ACTIVE to DONE | | 1 | 0 | 0 | 0 | 0 | 0 | 1 | DONE to IDLE | | 1 | 0 | 0 | 1 | 0 | 0 | 1 | DONE to IDLE | | 0 | 1 | 1 | 0 | 0 | 0 | 1 | Invalid state recovery | | 1 | 1 | 1 | 1 | 0 | 0 | 1 | Invalid state recovery | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | Invalid state recovery |
Simulation shows N0 = 0 for input S2=0, S1=1, S0=1, Go=0. The state machine fails to recover from an invalid state. Inspect the circuit and correct the fault.
Constraints
- Do not modify the logic paths for valid state transitions.
- Ensure all invalid one-hot states route to the IDLE state.
Topics
Solve this problem
Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.
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