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Codiode/Problems/Sequential Logic

Bidirectional SR: SER_L Floating Debug

HardLogic CircuitDebug

A 4-bit bidirectional shift register moves data across four flip-flops based on the DIR control signal.

Expected behavior:

| DIR | Operation | Q3 (Next) | Q2 (Next) | Q1 (Next) | Q0 (Next) | |-------|-----------|-------------|-------------|-------------|-------------| | 0 | Shift Right | Q2 | Q1 | Q0 | SER_R | | 1 | Shift Left | SER_L | Q3 | Q2 | Q1 |

Simulation shows correct behavior for right shifts (DIR = 0). However, during left shifts (DIR = 1), Q3 enters an undefined state (X) instead of tracking the SER_L input. The serial stream is corrupted at the most significant bit. Inspect the circuit and correct the fault.

Constraints

  • Correct the existing fault without altering the core shift register architecture.
  • Do not add external logic gates.

Topics

sequentialshift-registerdebug

Solve this problem

Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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