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Codiode/Problems/Sequential Logic

Debug: Dropped Data in Handshake

MediumLogic CircuitDebug

A standard valid-ready handshake protocol ensures robust data transfer between hardware modules across varying processing speeds. The flow control circuit generates an En signal to capture incoming data into an internal register. The En signal must assert only when a successful handshake occurs.

Expected behavior:

| Valid | Ready | En | |---------|---------|------| | 0 | 0 | 0 | | 0 | 1 | 0 | | 1 | 0 | 0 | | 1 | 1 | 1 |

Simulation shows En = 1 for input Valid=1, Ready=0. The register overwrites unread data during a stall. Inspect the circuit and correct the fault.

Constraints

  • Only modify the logic driving the En output.
  • Do not add new input or output pins.

Topics

DebugHandshakeValid-ReadyFlow Control

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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