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Codiode/Problems/Sequential Logic

Mod-6 Counter: State 7 Self-Loop

HardLogic CircuitDebug

A Mod-6 counter's next-state logic calculates the subsequent state for a 0 to 5 counting sequence and ensures safe recovery from invalid states.

Expected behavior:

| Q2 | Q1 | Q0 | D2 | D1 | D0 | |------|------|------|------|------|------| | 0 | 0 | 0 | 0 | 0 | 1 | | 0 | 0 | 1 | 0 | 1 | 0 | | 0 | 1 | 0 | 0 | 1 | 1 | | 0 | 1 | 1 | 1 | 0 | 0 | | 1 | 0 | 0 | 1 | 0 | 1 | | 1 | 0 | 1 | 0 | 0 | 0 | | 1 | 1 | 0 | 0 | 0 | 0 | | 1 | 1 | 1 | 0 | 0 | 0 |

Simulation shows D2 = 1, D1 = 1, and D0 = 1 for input Q2=1, Q1=1, Q0=1. The counter correctly recovers from state 6 but locks into a self-loop at state 7. Inspect the circuit and correct the fault.

Constraints

  • Do not alter the valid counting sequence logic for states 0 through 5.
  • The circuit must successfully map all invalid states back to 0.

Topics

CountersState MachinesNext-State Logic

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Place the gates, wire them up and watch the signals settle. Every submission runs on the same simulation engine that grades it.

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