4-Bit Full Adder
Design a 4-bit full adder in Verilog.
The adder takes two 4-bit operands a and b and a carry-in cin, then produces a 4-bit sum and a single-bit carry-out cout.
Operation
{cout, sum} = a + b + cin
The result is 5 bits wide: the upper bit is cout and the lower 4 bits are sum.
Example
| a | b | cin | sum | cout | |------|------|-----|------|------| | 0111 | 1000 | 0 | 1111 | 0 | | 0111 | 1000 | 1 | 0000 | 1 | | 1111 | 0001 | 0 | 0000 | 1 |
Full adders are the foundation of all arithmetic units in processors and FPGAs. Verilog lets you express this with a single assign statement using the + operator.
Constraints
- Purely combinational — no clock or sequential elements
- Use a single
assignwith Verilog's built-in+operator coutis the 5th bit of the sum — use concatenation{cout, sum}- No signed arithmetic needed
Topics
Solve this problem
Write the module in Verilog, SystemVerilog or VHDL. Your submission is compiled and simulated against a real testbench — you get the waveform back, not a stored answer.
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